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University of Guyana

Faculty of Natural Sciences - Department of Computer Science

CSI 311 - Computer Architecture and Organization

Lectures - 3 hours/week

Tutorials - 1 hour/week

Labs - 2 hours/week

Course Objective(s): The objective of this course is to provide students with an understanding of the hardware/software interface. After completing this course students should understand how assembly language relates to machine instructions and how machine instructions relate to hardware.

1. Classes/Operating principles of Electronic computers.
2. Basic Characteristics of computers.
3. Computer applications and types Concept of Computer systems.
4. Positional Numbering systems. Binary arithmetic.
5. Number representation in computers.
6. True One's Complement and Two's Complement representation.
7. Encoding Decimal numbers and alphanumeric information, II
8. Combination and Sequential circuits. I
9. Logic systems. Flip-Flops, Registers, Decoders.
10. Multiplexers, Counters, Adder.
11. Memory devices and Classification.
12. Addressed, Associative and Stack type memories.
13. Addressable memory structures.
14. Introduction to Micro-operation language.
15. AIJU structure and Micro program for Adding, Subtracting, Multiplying and Dividing Fixed-Point numbers.
16. Operations on Decimal Arithmetic.
17. Operations on Floating-point numbers.
18. Multifunction ALU. Distinctions of Microprocessor ALU's.
19. Operating principles of Control Automation with "Stored" and "hardwired” Logic.
20. Programmable Logic arrays in Control Automations.
21. Address Structures of Main memory devices. 'I
22. Addressing Modes.
23. Register Structures of microprocessors
24. Addressing Modes and instruction Set of 8 and 16 Bit Microprocessors.
25. Processor purpose and Structure.
26. Micro program Interpretation of Computer Instruction Language,
27. Concept of Processor status.
28. Interrupt Systems and Control Mode Organization.
29. Operating Cycle of processor.
30. Parallel and pipeline processors.
31. Organization of 8- and 16- Bit microprocessors.
32. Principles of I/O system Design and Structure.
33. Functions of I/O channels.
34. Control information for I/O operations - Interrupts.
35. Structures and types of I/O channels.
36. Interface organization elements - Bus and Line.
37. Uni-bus and Multi-bus interface of computers.
38: Overview of Fault-Tolerant Multiprocessor Computer Complexes.
39. Overview of Multi computer systems.

Course Schedule:

Week 1 - Introduction to the concept of the computer
- Discussions on Von Neumann and Harvard Architecture
- Concept of Abstraction
- Introduction to Boolean Algebra

Week 2 - Combinational Logic Design
- Boolean Algebra and the gate abstraction
- Hardware reduction (K-maps)
- basic combinational circuits
Lab - Introduction to various logic simulators and building of combinational logic circuits

Week 3 - Sequential Logic Design
- D flip flops
- Registers
- combining combinational logic with sequential logic
Lab - Exploration of sequential logic circuits and building of logic circuits with state

Week 4 - Digital Building blocks
- addition
- subtraction
- comparators
Lab - implementation of building blocks

Week 5 - Digital Building blocks
- Arithmetic logic unit (ALU)
- Shifters and rotators
Lab - implementation of building blocks

Week 6 - Digital Building blocks
- Multiplication and Division
Lab - implementation of building blocks

Week 7 - Number systems
- fixed point number systems
- floating point number systems
- Memory and logic arrays (various types of memory and logic arrays)
Lab - implementation of building blocks

Week 8 - Architecture
- Instructions (RISC and CISC philosophies)
- Operands: Registers, Memory and constants
Lab - implementation of building blocks

Week 9 - Architecture
- Machine language
- R type instructions
- I type instructions
- J type instructions
Lab - implementation of building blocks

Week 10 - The datapath
- MIPS datapath
Lab - implementation of a simple datapath

Week 11 - The control unit
- MIPS control unit
- Integration of control unit and data path
Lab - implementation of a single cycle MIPS datapath

Week 12 - Performance Enhancement
- Multicycle datapath
- introduction to pipelining
Lab - implementation of a single cycle MIPS datapath

Week 13 - Pipelining
- Pipelined Datapath
- Pipelined Control
- Hazards
Lab - implementation of a single cycle MIPS datapath

Week 14 - Memory Systems
- Caches
- Virtual Memory
- Memory Mapped I/O
Lab - implementation of a single cycle MIPS datapath

Week 15 - Course review

ASSESSMENTS (Coursework)

Labs / Projects - 35 %

2 Tests - 50%

Assignments / Quizzes / Class participation - 15%,


1. The Elements of Computing Systems - Noam Nisan and Shimon Schocken
2. Digital Design and Computer Architecture - David Harris and Sarah Harris
3. Computer Organization and Design - David Patterson and John Hennessy

Tutorials will be held on Saturdays before lab at 0915.

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